Unlike conventional
RAM chip technologies, in MRAM data is not stored as
electric charge or current flows, but by
magnetic storage elements.
The elements are formed from two
ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates is a permanent magnet set to a particular polarity, the other's field will change to match that of an external field. A memory device is built from a grid of such "cells".
Reading is accomplished by measuring the
electrical resistance of the cell.A particular cell is (typically) selected by powering an associated
transistor which switches current from a supply line through the cell to ground. Due to the
magnetic tunnel effect, the
electrical resistance of the cell changes due to the orientation of the fields in the two plates. By measuring the resulting current, the resistance inside any particular cell can be determined, and from this the polarity of the writable plate. Typically if the two plates have the same polarity this is considered to mean "0", while if the two plates are of opposite polarity the resistance will be higher and this means "1".
Data is written to the cells using a variety of means. In the simplest, each cell lies between a pair of write lines arranged at right angles to each other, above and below the cell. When current is passed through them, an induced magnetic field is created at the junction, which the writable plate picks up. This pattern of operation is similar to core memory, a system commonly used in the 1960s. This approach requires a fairly substantial current to generate the field, however, which makes it less interesting for low-power uses, one of MRAM's primary disadvantages. Additionally, as the device is scaled down in size, there comes a time when the induced field overlaps adjacent cells over a small area, leading to potential false writes. This problem, the half-select (or write disturb) problem, appears to set a fairly large size for this type of cell. One experimental solution to this problem was to use circular domains written and read using the giant magnetoresistive effect, but it appears this line of research is no longer active.
Another approach, the toggle mode, uses a multi-step write with a modified multi-layer cell. The cell is modified to contain an "artificial antiferromagnet" where the magnetic orientation alternates back and forth across the surface, with both the pinned and free layers consisting of multi-layer stacks isolated by a thin "coupling layer". The resulting layers have only two stable states, which can be toggled from one to the other by timing the write current in the two lines so one is slightly delayed, thereby "rotating" the field. Any voltage less than the full write level actually increases its resistance to flipping. That means that other cells located along one of the write lines will not suffer from the half-select problem, allowing for smaller cell sizes.
A newer technique, spin-torque-transfer (STT) or Spin Transfer Switching, uses spin-aligned ("polarized") electrons to directly torque the domains. Specifically, if the electrons flowing into a layer have to change their spin, this will develop a torque that will be transferred to the nearby layer. This lowers the amount of current needed to write the cells, making it about the same as the read process [1]. There are concerns that the "classic" type of MRAM cell will have difficulty at high densities due to the amount of current needed during writes, a problem STT avoids. For this reason, the STT proponents expect the technique to be used for devices of 65 nm and smaller.[citation needed] The downside is that, at present, STT needs to switch more current through the control transistor than conventional MRAM, requiring a larger transistor, and the need to maintain the spin coherence. Overall, however, the STT requires much less write current than conventional or toggle MRAM.
Comparison with other systems
Density
The main determinant of a memory system's cost is the density of the components used to make it up.DRAM uses small
capacitors as a memory element, wires to carry current to and from it, and a transistor to control it – referred to as a "1T1C" cell. Capacitors basically consist of two small metal plates separated by a thin insulator, a single element that can be built as small as the current fabrication technology allows. This makes DRAM the highest density RAM currently available, and thus the least expensive, which is why it is used for the majority of RAM found in a computer.
MRAM is physically similar to DRAM in makeup, although often does not require a transistor for the write operation. However, as mentioned above, the most basic MRAM cell suffers from the half-select problem, which limits cell sizes to around 180 nm or more. Toggle-mode MRAM offers a much smaller size before this becomes a problem, apparently around 90 nm
[2], the same size as most current DRAM products. To be worth putting into wide production, however, it is generally believed that MRAM will have to move to the 65 nm size of the most advanced memory devices, which will require the use of STT.
Power consumption
Since the capacitors used in DRAM lose their charge over time, memory assemblies using them must periodically
refresh all the cells in their chips approximately 1000 times a second, reading each one and re-writing its contents. This demands a constant power supply, which is why DRAM loses its memory when power is turned off on the computer. As DRAM cells decrease in size, the refresh cycles become shorter, and the power draw more continuous.
In contrast, MRAM requires no refresh at any time. Not only does this mean it retains its memory with the power turned off, but also that there is no constant power draw. While the read process theoretically requires more power than the same process in a DRAM, in practice the difference appears to be very close to zero. However, the write process requires more power in order to overcome the existing field stored in the junction, varying from three to eight times the power required during reading . Although the exact amount of power savings depends on the nature of the work – more frequent writing will require more power – in general MRAM proponents expect much lower power consumption (up to 99% less) compared to DRAM. STT-based MRAMs eliminate the difference between reading and writing, further reducing power requirements
Speed
DRAM speed is limited by the speed at which the charge stored in the cells can be drained (for reading) or stored (for writing). MRAM operation is based on measuring voltages rather than charges or currents, so there is less "settling time" needed.
IBM researchers have demonstrated MRAM devices with access times on the order of 2 ns, somewhat better than even the most advanced DRAMs built on much newer processes
The only current memory technology that easily competes with MRAM in terms of speed is
Static RAM, or SRAM. SRAM consists of a series of transistors arranged in a
flip-flop, which will hold one of two states as long as power is applied. Since the transistors have a very low power requirement, their switching time is very low. However, since an SRAM cell consists of several transistors, typically six or four, its density is much lower than DRAM. This makes it expensive, which is why it is used only for small amounts of high-speed memory, notably the
CPU cache in almost all modern
CPU designs.
Overall
MRAM has similar speeds to SRAM, similar density of DRAM but much lower power consumption than DRAM, and is much faster and suffers no degradation over time in comparison to Flash memory. It is this combination of features that some suggest make it the "universal memory", able to replace SRAM, DRAM and
EEPROM and Flash. This also explains the huge amount of research being carried out into developing it.
In comparison, MRAM is still largely "in development", and being produced on older non-critical fabs. The only commercial product widely available at this point is
Freescale Semiconductor's 4 Mbit part, produced on a several-generations-old 180 nm process. As demand for Flash continues to outstrip supply, it appears it will be some time before a company can afford to "give up" one of their latest fabs for MRAM production. Even then, MRAM designs currently do not come close to Flash in terms of cell size, even using the same fab.
